Quintauris, the industry consortium set up to promote compatibility in RISC-V-based products, has formed a strategic partnership with US memory maker Everspin Technologies to strengthen the reliability of open-standard processors in automotive and other safety-critical markets.
The Munich-based organisation, which was founded in 2023 by a group of semiconductor companies including Bosch, Infineon, Nordic Semiconductor, NXP, Qualcomm, and STMicroelectronics, said the deal would integrate Everspin’s magnetoresistive RAM (MRAM) into its reference architectures and real-time platforms.
Everspin, headquartered in Chandler, Arizona and listed on Nasdaq, is regarded as a leader in MRAM and spin-transfer torque MRAM technology. The company has shipped more than 200m devices and has positioned itself as a specialist in memory for demanding environments such as industrial systems, data centres, and automotive electronics.
Both companies said the collaboration was aimed at addressing one of the key hurdles to broader adoption of RISC-V processors in safety-driven markets: ensuring data persistence and integrity under conditions such as power loss, radiation exposure, or extreme temperatures.
“Everspin’s leadership in MRAM and their track record of over 200 million products deployed make them a strong addition to our ecosystem,” said Pedro Lopez, Market Strategy Officer at Quintauris. “Together, we are closing the gap between innovation and dependability, enabling RISC-V to be confidently adopted in next-generation automotive programmes.”
David Schrenk, Vice-President of Business Development at Everspin, added that the open-source instruction set architecture was “opening new doors in safety-critical computing” but required dependable memory systems to meet automotive standards for performance and reliability.
The move underlines Quintauris’ strategy of making RISC-V a viable alternative to proprietary architectures such as Arm, particularly in sectors where certification, supply security, and functional safety are essential.
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